1. Field
This application relates to systems for vacuum processing, such as systems used in the fabrication of solar cells, flat panel displays, touch screens, etc.
2. Related Art
Various systems are known in the art for fabricating semiconductor IC's, solar cells, touch screens, etc. The processes of these systems are conducted in vacuum and include, e.g., physical vapor deposition (PVD), chemical vapor deposition (CVD), ion implant, etch, etc. There are two basic approaches for such systems: single-substrate processing or batch processing. In single wafer processing, only a single substrate is present inside the chamber during processing. In batch processing several substrates are present inside the chamber during processing. Single substrate processing enables high level of control of the process inside the chamber and the resulting film or structure fabricated on the substrate, but results in a relatively low throughput. Conversely, batch processing results in less control over the processing conditions and the resulting film or structure, but provides a much higher throughput.
Batch processing, such as that employed in systems for fabricating solar cells, touch panels, etc., is generally performed by transporting and fabricating the substrates in a two-dimensional array of n×m substrates. For example, a PECVD system for solar fabrication developed by Roth & Rau utilizes trays of 5×5 wafers for a reported 1200 wafers/hour throughput in 2005. However, other systems utilize trays having two dimensional arrays of 6×6, 7×7, 8×8, and even higher number of wafers. While throughput is increased utilizing trays of two-dimensional wafer arrays, the handling and the loading and unloading operations of such large trays becomes complex.
In some processes, it is required to apply bias, e.g., RF or DC potential, to the substrate being processed. However, since batch system utilize a moving tray with the substrates, it is difficult to apply the bias.
Also, while some processes can be performed with the substrate held horizontally, some processes can benefit from a vertically held substrate. However, loading and unloading of substrate vertically is complex compared to horizontal loading and unloading.
Some processes may require the use of masks to block parts of the substrate from the particular fabrication process. For example, masks may be used for formation of contacts or for edge exclusion to prevent shunting of the cell. That is, for cells having contacts on the front and back sides, materials used for making the contacts may be deposited on the edges of the wafer and shunt the front and back contacts. Therefore, it is advisable to use mask to exclude the edges of the cell during fabrication of at least the front or back contacts.
As another illustration, for the fabrication of silicon solar cells, it is desirable to deposit blanket metals on the back surface to act as light reflectors and electrical conductors. The metal is typically aluminum, but the blanket metals could be any metal used for multiple reasons, such as cost, conductivity, solderability, etc. The deposited film thickness may be very thin, e.g., about 10 nm up to very thick, e.g., 2-3 um. However, it is necessary to prevent the blanket metal from wrapping around the edge of the silicon wafer, as this will create a resistive connection between the front and back surfaces of the solar cell, i.e., shunting. To prevent this connection, an exclusion zone on the backside edge of the wafer can be created. The typical dimension of the exclusion zone is less than 2 mm wide, but it is preferable to make the exclusion as thin as possible.
One way to create this exclusion zone is through the use of a mask; however, using masks has many challenges. Due to the highly competitive nature of the solar industry, the mask must be very cheap to manufacture. Also, due to the high throughputs of solar fabrication equipment (typically 1500-2500 cells per hour), the mask must be quick and easy to use in high volume manufacturing. Also, since the mask is used to prevent film deposition on certain parts of the wafer, it must be able to absorb and accommodate deposition build up. Furthermore, since film deposition is done at elevated temperatures, the mask must be able to function properly at elevated temperature, e.g., up to 350° C., while still accurately maintaining the exclusion zone width, while accommodating substrate warpage due to thermal stresses.